With the development of computer technologies and the improvement of image recognition technologies, data identification utilizing media such as bar codes has been widely used for identification of product data and the like. It is expected that the amount of data to be identified will be further increased in the future. On the other hand, data identification utilizing bar codes is disadvantageous in that a bar code reader is required to be in contact with bar codes, and the amount of data stored in bar codes cannot be increased so much. Therefore, contactless data identification and increase in the storage capacity of media are required.
In view of the foregoing, an ID chip using an IC has been developed in recent years. According to the ID chip, required data is stored in a memory circuit of an IC chip and the data is read by a contactless means, generally by a wireless means. It is expected that practical application of such an ID chip allows commercial distribution and the like to be simplified and reduced in cost while maintaining high security.
An identification system using an ID chip is briefly described with reference to FIG. 4. FIG. 4 is a schematic view showing an identification system for obtaining identification data of a bag by wireless. An ID chip 401 storing specific identification data is mounted on or incorporated in a bag 404. Electromagnetic waves are transmitted from an antenna unit 402 of an interrogator (also called a reader/writer) 403 to the ID chip 401. Receiving the electromagnetic waves, the ID chip 401 sends its identification data back to the antenna unit 402. The antenna unit 402 transmits the received identification data to the interrogator 403, and the interrogator 403 determines the identification data. In this manner, the interrogator 403 can obtain the data of the bag 404. Such a system enables distribution management, tabulation, prevention of counterfeit goods, and the like.
The ID chip has, for example, a configuration shown in FIG. 2. A semiconductor device 200 used as an ID chip includes an antenna circuit 201, a rectification circuit 202, a stabilizing power supply circuit 203, an amplifier 208, a demodulation circuit 213, a logic circuit 209, a memory control circuit 212, a memory circuit 211, a logic circuit 207, an amplifier 206, and a modulation circuit 205. The antenna circuit 201 includes an antenna coil 301 and a tuning capacitor 302 (FIG. 3A). The rectification circuit 202 includes diodes 303 and 304, and a smoothing capacitor 305 (FIG. 3B).
The operation of such an ID chip is described hereinafter. An AC signal received by the antenna circuit 201 is half-wave rectified by the diodes 303 and 304, and then smoothed by the smoothing capacitor 305. The smoothed voltage, which has many ripples, is stabilized by the stabilizing power supply circuit 203, and the stabilized voltage is supplied to the modulation circuit 205, the demodulation circuit 213, the amplifier 206, the logic circuit 207, the amplifier 208, the logic circuit 209, the memory circuit 211, and the memory control circuit 212. Meanwhile, a signal received by the antenna circuit 201 is inputted as a clock signal to the logic circuit 209 through the amplifier 208. A signal inputted from the antenna coil 301 is demodulated by the demodulation circuit 213, and inputted as data to the logic circuit 209.
The data inputted to the logic circuit 209 is decoded. Since the interrogator encodes data by deformable mirror code, NRZ-L code or the like, the logic circuit 209 decodes the data. The decoded data is transmitted to the memory control circuit 212, thereby memory data stored in the memory circuit 211 is read. The memory circuit 211 is required to be a nonvolatile memory circuit such as a mask ROM, which is capable of holding data even when a power supply is turned off. The memory circuit 211 stores, for example, 16-byte data having 4-byte family code representing the ID chip sequence, 4-byte application code, and two kinds of 4-byte user codes set by users (see FIG. 12).
The frequency of a transmitted and received signal is 125 kHz, 13.56 MHz, 915 MHz, or 2.45 GHz each having an ISO standard and the like. In addition, modulation and demodulation systems for transmitting and receiving signals are also standardized. An example of such an ID chip is disclosed in Patent Document 1. [Patent Document 1] Japanese Patent Laid-Open No. 2001-250393
The aforementioned conventional semiconductor device for an ID chip has the following problems. If a mask ROM is used as a memory circuit, data cannot be written except in the manufacture of a chip. Thus, data that is different for each chip is required to be written in the manufacture of the chip. When such a chip is manufactured, each chip pattern is formed by electron beam exposure. The electron beam exposure has poor throughput while increased flexibility of exposure.
In general, the following method is adopted for manufacturing the same chip in large quantities. FIG. 5 shows a schematic view of a mirror projection exposure system. The mirror projection exposure system includes a concave mirror 501, a convex mirror 502, a reticle 503, a substrate 504, a slit 505, and a light source 506. The slit 505 limits the area where light from the light source 506 can pass. The light passing the slit 505 passes the reticle 503, and after being reflected by the concave mirror 501 and the convex mirror 502, it is irradiated to the substrate 504. By moving the reticle 503 and the substrate 504, a pattern on the reticle 503 is exposed on the substrate 504. In FIG. 5, the reticle 503 moves from right to left while the substrate 504 moves from left to right. If the same chip is drawn on the reticle 503 in large quantities, the same pattern can be transferred onto the substrate 504.
FIG. 6 shows a schematic view of a step and scan exposure system. The step and scan exposure system includes a stage 601, a substrate 602, an optical system 603, a reticle 604, an optical system 605, a slit 606, an optical system 607, and a light source 608. Light from the light source 608 is irradiated to the slit 606 through the optical system 607, and the slit 606 limits the area where the light passes. Then, the light is irradiated to the reticle 604 through the optical system 605. The light passing the reticle 604 is irradiated to the substrate 602 through the optical system 603. The substrate 602 as well as the stage 601 moves in the same direction as the reticle 604 (from left to right in FIG. 6). Accordingly, a pattern on the reticle 604 is transferred onto the substrate 602. The step and scan exposure system allows a large-area exposure with high definition.
The aforementioned mirror projection exposure and step and scan exposure, a step and repeat exposure (stepper exposure) that is not yet described, and the like are advantageous in forming the same pattern. However, chips each including different data as described above are difficult to be formed by these exposure systems.
Meanwhile, if an EEPROM is used as a memory circuit, user can rewrite data freely after the manufacture of a chip. However, at the same time, anyone other than the user can change data for identification that should not be rewritten, which allows counterfeiting. Thus, an ID chip of which counterfeiting is impossible is required.